The register map (v0.1)
The contract between the 65816 software and the three programmable devices: what each register does. Version 0.1, still a proposal to be validated.
The common conventions
- Each block exposes 32 8-bit registers, from
$00to$1F, repeated eight times in its 256-byte page. - 16- or 24-bit values store the low byte at the lowest address (suffixes
_L,_M,_H). A write takes effect only when the_Hbyte is written; a read of_Lfreezes the others. - Register
$1F(ID) gives the block’s identifier and the version of its map: 9K = 1, video = 2, Pico = 3; an expansion card is invited to return F. - Each block has an interrupt mask (
IRQ_EN) and a status register (IRQ_STAT) that the interrupt handler reads to find the source.
The 9K, system controller ($00:9C00)
| Registers | Role |
|---|---|
SYS_CLK, SYS_STATUS | PHI2 speed (values to be defined after measurement), status of the PSRAMs, the codec and start-up |
IRQ_EN, IRQ_STAT, TMR_* | interrupts and timer |
FM_*, PSG_* | access to the FM (YM2151) and PSG (AY-3-8910) sound cores, to be revised if another timbre is chosen |
PCM_*, MIX_* | sample channel and mixer (FM, PSG, PCM volumes) |
DMA_* | recording by DMA: address in PSRAM, length, format |
I2C_CTRL, I2C_DATA | control of the audio codec, over its I²C at 1.8 V |
MEM_PTR_*, MEM_DATA | memory port: read or write a PSRAM byte at a 24-bit address, with automatic advance |
The video, Tang Nano 20K ($00:9D00)
| Registers | Role |
|---|---|
VADDR0_*, VINC0, VDATA0 | port 0: video address, step, data |
VADDR1_*, VINC1, VDATA1 | port 1, identical |
VCTRL, VMODE | display on, reset; mode number (list to be defined) |
IRQ_EN, IRQ_STAT, IRQ_LINE_* | interrupts: vertical blank, chosen line, sprite collision (if kept) |
SCAN_*, BORDER | line currently being displayed; border colour |
The resolution, the modes, the layers and the sprites are not yet defined: they will come with a video memory map.
The Pico, input/output ($00:9E00)
| Registers | Role |
|---|---|
CMD, STATUS, ERROR, ARG0 to ARG7 | mailbox: arguments, command code, status and error |
DATA, DATA_CNT_* | data port of the current command, and number of bytes waiting |
IRQ_EN, IRQ_STAT | end of command, keyboard, mouse, serial console, network |
KBD_*, MOUSE_*, JOY0, JOY1 | keyboard, mouse and two gamepads, read directly |
UART_DATA, UART_STATUS | serial console |
First commands: version, files (open, read, write, close, seek, list, delete), clock (read, set) and network status. The response time of the Pico, which works in software, is still to be measured; if it is not enough, the 9K will be able to stretch the clock during its accesses.
Loading at start-up (proposal)
During start-up, the processor is held off the bus. The Pico then takes its place on part of the bus and writes, through the 9K’s memory port, the vectors and then the boot code into the PSRAM. A start-up completion register is still to be added. The mechanism requires no extra pins; the pace of the accesses on the Pico’s side is still to be checked.
What remains to be validated
- The sound cores, and therefore the FM and PSG registers.
- The formulas for the PHI2 speed, the PCM frequency and the timer prescaler.
- Loading at start-up by the Pico and its completion register.
- The video modes, the resolution and the video memory map.
- The keyboard and gamepad formats, and the wiring of the DE-9 sockets.
- The Pico’s response time on the bus.
The complete map, register by register, is in the repository: docs/registers.md, checked by
tools/check_registers.py.