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Video: a Tang Nano 20K as a graphics card

The Project 816 graphics card is an FPGA, the Tang Nano 20K. The processor sees only a window of 32 registers into it, in the manner of the Commander X16’s VERA.

The role of the 20K

The Tang Nano 20K is an FPGA from Sipeed, larger than the 9K. In Project 816, it:

  • acts as a VERA-style video chip, like the one in the Commander X16;
  • produces the picture on an HDMI socket;
  • keeps the video memory in its own SDRAM, taking no space in the processor’s 16 MB.

A window of 32 registers

The 20K is not connected to the whole bus: it sees only A0 to A4 (32 registers), D0 to D7, a select, R/W and PHI2. Its registers appear in the page $00:9D00 – $00:9DFF.

The processor therefore does not write directly into video memory: it accesses it indirectly, as on the VERA. The register map (v0.1, to be validated) provides two ports: for each one, the processor gives a video address and a step, then reads or writes the bytes one by one through a data register, the address advancing on its own. Other registers switch the display on, select the mode (VMODE), give the current line and trigger an interrupt at vertical blank or at a chosen line. See The register map.

Interrupts

The 20K can request the processor’s attention by pulling the IRQB or NMIB interrupt line, as open drain, directly, without going through the 9K.

What remains to be defined

The resolution, the display modes, the layers and the sprites are not yet defined: they will be described in a video memory map, to which these registers give access. Sound over the HDMI socket is a planned evolution, through the 20K.

Sources in the repository : docs/SPEC.md.