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The memory map

The 65816 sees 16 MB, and Project 816 fills all of them with RAM. Only four small pages of the first bank are used to talk to the peripherals.

The Project 816 memory mapThe 65816 addresses 16 MB in 256 banks of 64 KB, and all of them are RAM: banks $00 to $7F in the first 8 MB PSRAM, $80 to $FF in the second. In bank $00, four 256-byte pages, from $9C00 to $9FFF, are reserved for the registers of the 9K, the video, the Pico and the expansion port; everything else is RAM, vectors included.The 65816's 16 MB256 banks of 64 KB, all RAM$00bank 0: detail on the right$01–$7FRAM: 1st PSRAM (CS0#)$80–$FFRAM: 2nd PSRAM (CS1#)Bank $00RAM and four register pages$0000–$9BFFRAM$9C009K: sound, interrupts, DMA$9D00video (Tang Nano 20K)$9E00Pico: SD, USB, Wi-Fi, clock$9F00expansion port$A000–$FFFFRAM, including the 65816 vectorsEach block exposes 32 registers, repeated across its 256-byte page.(not to scale)
The Project 816 memory map.

The full table

AddressesContentsSignal
$00:0000 – $00:9BFFRAMPSRAM through the 9K
$00:9C00 – $00:9CFF9K registers: sound, interrupts, DMA, configurationinternal to the 9K
$00:9D00 – $00:9DFFvideo (Tang Nano 20K)video select
$00:9E00 – $00:9EFFPico: SD, USB, Wi-Fi, clock, serial linkPico select
$00:9F00 – $00:9FFFexpansion port/IOSEL
$00:A000 – $00:FFFFRAM, including the 65816 vectors, loaded at start-upPSRAM through the 9K
$01:0000 – $7F:FFFFRAM: the rest of the first PSRAM (banks $00 to $7F, 8 MB)PSRAM through the 9K, CS0#
$80:0000 – $FF:FFFFRAM: the second PSRAM (8 MB)PSRAM through the 9K, CS1#

There is no longer an area reserved for an expansion card: the 16 MB of RAM fill the whole space. An expansion card keeps its page of registers at $00:9F00.

The input/output pages

The peripherals occupy whole 256-byte pages in bank $00. The 9K decodes them from A8 to A15 and the latched bank.

Each peripheral exposes only 32 registers, selected by A0 to A4. These 32 registers repeat throughout its 256-byte page: $9D00 and $9D20 refer to the same register.

The register map

The detailed map of the 32 registers of each block (9K, video, Pico) exists in version 0.1, as a proposal to be validated: see The register map. It must be validated before writing the corresponding Verilog or firmware. It is the contract between the three programmable devices and the 65816 software: any change to a register will have to be carried over on both sides.

Sources in the repository : docs/SPEC.md.