The project: goals and phases
A real 65816, FPGAs for everything that used to be dedicated chips, and a rule of caution: only make a board once the previous one has been validated.
What the project aims to produce
Project 816 is a neo-retro 16-bit microcomputer: retro in its processor, a real WDC W65C816S, neo in everything around it. The project is to produce and maintain:
- the electronic schematics (KiCad) of the boards;
- the Verilog code of the two FPGAs;
- the firmware of the Pico 2 W;
- the tools and the documentation.
The specification (docs/SPEC.md in the repository) is the source of truth. Any change to the
pinout, the memory map, the expansion port or the architecture is first proposed and
written there, and only then applied to the schematics, the code or the firmware.
The main choices
| Choice | What it implies |
|---|---|
| Everything at 3.3 V | no level shifters on the board; 5 V is used only for USB and to power the modules |
| No ROM | all the memory is made of 16 MB of PSRAM; the boot program is written into it before the processor starts |
| The cheapest | 16 MB of PSRAM for about $8, at the cost of speed: about 6 MHz on average (estimate, to be measured) |
| FPGAs | bus control, sound and video are described in Verilog, so they can be changed without redoing the board |
| A register window | the video and the Pico each expose only 32 registers; the processor accesses video memory indirectly, as with the Commander X16’s VERA |
| The Mini-ITX format | a 170 × 170 mm board that fits in a standard PC case |
Start-up
At start-up, the processor is held in reset and off the bus (pins RESB and BE low). Meanwhile, the 9K configures itself and writes into PSRAM the boot code supplied by the Pico. Then the 9K releases RESB and BE, and the processor starts on that code. The 65816’s vectors (the addresses where it starts and where it goes on an interrupt) are part of what is loaded.
Three phases
- Phase 1, the validation board. A 2-layer printed circuit board, about 100 × 100 mm, with the processor, the PSRAM and the soldered system-controller FPGA (assembled by JLCPCB), and headers to connect the rest. It must validate three things: bank latching, memory access timings and the controller Verilog.
- Phase 2, the Mini-ITX board. A 4-layer board, 170 × 170 mm, that integrates the whole machine. See The Mini-ITX board.
- Phase 3, the software. A monitor, a BASIC or an operating system, and tools.
The budget
The specification estimates the complete machine at between €250 and 450, including the printed circuit board, case and power supply. The component breakdown is in The Mini-ITX board.